DO-254 and AMC/AC 20-152A Training

Development processes for hardware used in aviation.

COURSE DEFINITION AND PURPOSE

DO-254 and AMC/AC 20-152A Training

DO-254 in conjuction with AMC 20-152A is the primary certification reference for airborne electronic hardware (AEH). Our training guides the attendees to understand how to develop and verify simple or complex hardware ensuring it is produced with an acceptable, traceable, and verifiable development process. BRNAvionics training presents this development assurance framework, shaped by authority (FAA/EASA) expectations, so that it can be understood and implemented by engineers, quality and managers alike.

Training Objectives

Master Hardware Certification Fundemantals

Gain a deep understanding of the fundamental of the development assurance principles governing airborne electronic hardware under DO-254.

Implement DO-254 and AMC 20-152A Objectives

Learn to apply the COTS Devices, COTS IPs, and Custom Devices.

Master the Planning Process

Learn how to develop and execute comprehensive certification plans that align with authority expectations and project-specific requirements.

Inter-Process Integration

Understand the critical touchpoints between hardware development and other key processes, including System (ARP4754), Safety (ARP4761) and Software (DO-178C).

Comprehensive Lifecycle Management

Navigate the hardware development lifecycle effectively across all criticality levels, from DAL-A to DAL-D, through all levels of AEH development (LRU, CBA, ASIC/PLD).

Evidence-Based Development

Learn to generate rigorous, high-quality development data that fulfills all certification and safety requirements.

Our training programs are delivered exclusively as in-company sessions,

Position in the Certification Ecosystem

DO-254 is the bridge between system engineering, safety analysis, and hardware development.

ARP4754A

System and Hardware allocation processes.

ARP4761

Impact of safety analysis on hardware.

PHAC / HAS

Primary evidence to be presented to authority.

DAL Levels

Process assurance based on hardware fault class.

Hardware Life Cycle and Requirements

Full traceability from planning phase to hardware requirements.

Certification Planning (PHAC)

Technical communication tool with authority and base for certification strategy.

Hardware Requirements

The bridge and traceability between safety and design in the transition from system to hardware.

Process Plans (HDP, HVP, HCMP)

Defensible and technically consistent hardware process sets for auditing.

Design and Verification Strategies

Modern approaches transforming hardware design decisions into certification evidence.

Circuit Board Design Certification

Partitioning, isolation, and safety principles in architecture. Certification impact of clocking, reset, and timing decisions.

Design Integrity

FPGA Certification

HDL requirements, Synthesis, Place & Route, and Timing verification process within complex hardware scope.

Hardware Assurance

Verification: The Core of DO-254

Review, analysis, and test methods; verification depth and audit scenarios varying by DAL levels.

Independence

Verification independence and audit perspective for DAL A hardware.

Hardware Testing

Establishing functional verification as certification evidence.

Audit and Auditor Perspective

Strategic preparation for FAA/EASA Stage of Involvement (SOI) audits.

SOI-1

Planning: PHAC approval and process audit.

SOI-2

Development: Design and development evidence.

SOI-3

Verification: Test data and analysis results.

SOI-4

Final: Certification and aircraft acceptance.

Configuration Management

Change control, versioning, and traceable hardware baseline management.

Process Assurance (SQA)

Internal audit, finding management, and PR approach through real audit scenarios.

Advanced Hardware Topics

Modern challenges in hardware projects and methods to manage risk.

COTS Component

Establishing certification argument with commercial data.

COTS IP

IP usage and risk-based evaluation approach.

ASIC / FPGA

HDL code verification and toolchain security.

Risk Management

Certification impact of ready-to-use hardware risks.

Simple / Complex

Assurance expectations for complex hardware.

Training Methodology and Deliverables

We reinforce theoretical knowledge with application and audit scenarios.

Real Project Scenarios

Practical SOI audit rehearsals through avionics hardware documents.

Post-Training Gains

Participants become able to produce defensible hardware evidence for audits.

Verification Focused

Depth in review, analysis, and simulation.

Audit Simulation

Hardware-focused findings from SOI-1 to SOI-4.

Company Specific

Case analysis specialized for your own projects.

Target Audience and Logistics

Who is it for?

Design & Safety Engineers, Verification Teams, and Technical Leads.

Duration and Format

2 or 3 day programs. On-site or interactive classroom options.

Turkish / English

BRNAvionics Training Certificate

Are You Ready for Certification?

BRNAvionics training doesn’t just explain standards; it provides actionable, defensible knowledge for real projects.

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TrainingContent and Schedule Info

DO-254 and AMC/AC 20-152A Training